Electronic Design

Gain Abstraction And Accuracy From RTL Power Estimation

An effective RTL power-estimation methodology must leverage a standard, easily-available library of cell power models with accurate measurement algorithms. Cell- and load-level calculations—derived in ...
Semiconductor Engineering

Achieving Consistent RTL Power Accuracy

Are you struggling to accurately estimate RTL power consumption early in your design process? RTL power estimation can be inaccurate due to the complexity of the designs, the various power domains, ...
Nasdaq

Synopsys Unveils RTL Architect To Accelerate Design Closure

The RTL Architect product represents the industry's first physically aware RTL analysis, optimization, and signoff system built on a fast, multi-dimensional prediction engine for superior RTL handoff ...
EDN

Power fortunes: Estimating power in FPGA designs

In simpler times, FPGA power consumption was a simpler issue. In the traditional applications of high-capacity FPGAs, such as expensive network routers, telecommunications switching gear, and ...
EDN

‘Silicon aware’ tool tackles power at RTL

SAN FRANCISCO — Power-focused EDA startup Sequence Design Automation Monday (July 17) rolled out an updated version of its PowerTheater RTL power analysis and management tool said to include “silicon ...
Electronic Design

Emulation-Centric Power Analysis of SoC Designs

How FinFET technology has changed power-consumption analysis. Steps involved in taking a hierarchical approach to performing proper power analysis. Verification expert Lauro Rizzatti recently ...
Semiconductor Engineering

Know Your Own Power, Early And Accurately

Chip designers have always had to balance timing and area. Everyone wants a design as fast as possible and as compact as possible, but these two goals are usually in conflict. For the last couple of ...